Publicaciones Recientes

Two New Asymmetric Boolean Chaos Oscillators with No Dependence on Incommensurate Time-Delays and Their Circuit Implementation

Autores

Jesus M Muños-Pacheco,Tonatiuh García-Chávez, Victor R Gonzalez-Diaz, Gisela de La Fuente-Cortes, Luz del Carmen Gómez-Pavón

Fecha de publicación

Abril 2020

Revista

Symmetry

Volumen

12

Número

4

Páginas

506

Editor

Multidisciplinary Digital Publishing Institute

Descripción

This manuscript introduces two new chaotic oscillators based on autonomous Boolean networks (ABN), preserving asymmetrical logic functions. That means that the ABNs require a combination of XOR-XNOR logic functions. We demonstrate analytically that the two ABNs do not have fixed points, and therefore, can evolve to Boolean chaos. Using the Lyapunov exponent’s method, we also prove the chaotic behavior, generated by the proposed chaotic oscillators, is insensitive to incommensurate time-delays paths. As a result, they can be implemented using distinct electronic circuits. More specifically, logic-gates–, GAL–, and FPGA–based implementations verify the theoretical findings. An integrated circuit using a CMOS 180nm fabrication technology is also presented to get a compact chaos oscillator with relatively high-frequency. Dynamical behaviors of those implementations are analyzed using time-series, time-lag embedded attractors, frequency spectra, Poincaré maps, and Lyapunov exponents.

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A 65nm continuous-time sigma-delta modulator with limited OTA DC gain compensation

Autores

Victor R Gonzalez-Diaz, Fabio Pareschi

Fecha de publicación

2020/2/21

Revista

IEEE Access

Volumen

8

Páginas

36464-36475

Editor

IEEE

Descripción

This paper explores the effects of compensating the performance degradation in high-speed Continuous-Time Sigma-Delta modulators when the loop integrators are implemented through limited gain Operational Transconductance Amplifiers. Yet, the low DC-gain strongly affects both integrator magnitude and phase responses, with a reduction in the overall effective number of bits. This work models the degradation as due to a signal-dependent memory-less perturbation and theoretically studies its compensation by feeding an opposite signal back to the integrator input. The implementation and experimental results on a 65nm CMOS 2nd order prototype evaluate the performance increase with this technique, where no other compensation, nor any digital calibration, is included. Tested in different conditions, the compensated prototype improves more than 1.5 bit the ENoB with respect to the uncompensated …

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On-Chip Fuzzy Logic Synthesis of a New Ischemic and Non-Ischemic Heartbeat Classifier

Autores

Gisela De La Fuente-Cortes, A Diaz-Mendez, Guillermo Espinosa Flores-Verdad, Victor R Gonzalez-Diaz

Fecha de publicación

2020/7/7

Revista

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumen

68

Numero

1

Páginas

476-480

Editor

IEEE

Descripción

This brief presents a new ischemic and non-ischemic heartbeat classifier, which is highly synthesizable for on-chip applications. The classifier consists of an algorithm analyzing the electrocardiogram (ECG) shape to distinguish ischemia. It emulates medical expertise in cardiac ischemia diagnosis using a digital fuzzy logic system. The proposed fuzzy sets obtain information to classify ischemic and non-ischemic heartbeats, helping in discarding false positives. The work presents the physical implementation and experimental results on-chip in a CMOS 180nm process. The algorithm tests 20 electrocardiogram recordings from the Long-Term ST database in Physionet, verifying the method. The experimental results, with an 8-bit resolution, exhibit a sensitivity (Se) of 96.43 percent and specificity (Sp) of 96.88 percent with a (300 325) squared microns digital circuit. The implementation of the algorithm, with 14-bit …

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A Methodology for Practical Design and Optimization of Class-E DC-DC Resonant Converters

Autores

Andrea Celentano, Fabio Pareschi, Victor R Gozalez-Diaz, Riccardo Rovatti, Gianluca Setti

Fecha de publicación

2020/11/3

Revista

IEEE Access

Volumen

8

Páginas

205568-205589

Editor

IEEE

Descripción

In recently published papers, an innovative analytical approach for the design of a class-E resonant dc-dc converter has been first proposed and further extended to many other class-E converter topologies. Its peculiarity is to be dimensionless and based on the exact solution of the system of differential equations regulating the behavior of the circuit, ensuring very high precision and reliability with respect to all methodologies previously proposed by the state-of-the-art and based on the so-called sinusoidal approximation. Here, we review this methodology and improve it in a twofold way. On the one hand, we propose alternative modeling for some devices (in particular the transformer), increasing both flexibility and generality, with the possibility to extend the application to more topologies and more working points. On the other hand, a new normalization is proposed, showing that the actual dimension of the design …

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Ischemic and non-ischemic heartbeat classifier for portable automatic detection systems

Autores

Gisela De La Fuente Cortes, Jose Alejandro Diaz-Mendez, Guillermo Espinosa Flores-Verdad, Victor Rodolfo Gonzalez-Diaz

Fecha de publicación

2020/10/13

Revista

IEEE Latin America Transactions

Volumen

100

Numero

1e

Descripción

This article presents a new heartbeat classifier oriented to an automatic cardiac ischemia detection system aimed at the medical control of the population with cardiac disorders (a higher risk group of severe COVID-19). The algorithm focuses on distinguishing ischemic heartbeats from non-ischemic based on methods and techniques proposed by medical experts in cardiac ischemia diagnoses. The proposed algorithm was tested with 80 electrocardiogram recordings obtained from the Long-term ST database of Physionet with a 100,112 heartbeat population. The heartbeat population contains different types of non-ischemic cases. The algorithm exhibits a sensitivity of 98.7 percent and specificity of 97.23 percent. The digital synthesis, in a 180nm CMOS process with a dynamic power consumption of 13.15 micro Watt demanding an area of 490x400 micrometers, attests to the algorithm benefits.

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Designing a new data acquisition circuit for SiPM-based detection systems—MexSiC

Autores

SA Rosales-Nunez, A Bautista-Castillo, Victor Rodolfo Gonzalez-Diaz, D Durini, A Díaz-Sánchez, JM Rocha-Pérez, J de J Rangel-Magdaleno, R Alfaro, A Iriarte

Fecha de publicación

2020/3/24

Revista

Journal of Instrumentation

Volumen

15

Numero

03

Páginas

C03043

Editor

IOP Publishing

Descripción

Silicon Photomultipliers (SiPM) are currently an excellent option to replace the traditional photomultiplier tubes (PMT) due to the fact that they require much lower operational voltages than the PMTs with photon detection efficiencies (PDE) higher than 40% at peak wavelengths (in the blue-green visible part of the spectra), do not require the electromechanical complexity related with PMT based solutions, and are insensitive to magnetic fields. However, one disadvantage of SiPMs, if used in applications where huge detection areas are required, is their respectively small photoactive area (of few square millimeters). Modular approaches based on arrays of SiPMs are normally used in such cases. In order to use SiPM arrays, the modular data acquisition (DAQ) systems must be capable of reading multiple channels in parallel, synchronizing the times of arrival of all SiPM output pulses, processing these pulses …

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